Developed a detailed understanding of hardware requirements for a test data simulator in a mobile phone test set up, designed and developed the entire system including the board, FPGA, firmware and test application; resulting in high quality product development while reducing time-to-market for the product.

Client
Our client is a leading communication equipment manufacturer based in Europe.


Salient Product Features
CDMA Data Streamer is a test jig used to test the performance of a CDMA receiver under various conditions. The system performs the following functions:

	Acquires test data up to 4 GB and AGC data up to 256 MB from the host (PC) to system memory (SDRAM banks) as selected by the user, over a 100 Mbps Ethernet interface.
	Transfers I&Q data with/without AGC data from memory to the receiver in sync with their respective clocks. Data is downloaded from SDRAMs into an external FIFO (64 K x 16) at 50 MHz, and driven out from the user clock at 16/32 MHz.
	A GUI based control software displays status of data transfer between the SDRAM and the equipment under test by means of the sample number and a frame number.

Salient Tata Elxsi Solution Features
Board design and bring up for a compact (100 x 160mm), 8-layer PCB using SA110 processor with:

	Four 40-pin high-speed cable connectors each carrying data and ground signals for one data channel,
	One 40-pin flat cable connector to carry AGC data, handshake signals and ground signals,
	One SME connector for 'Data_sync_clock' input, and
	One 10/100 Mbps Ethernet (RJ-45) interface for downloading test data from the host (PC) and communication with the control program.

FPGA design to perform the following functions:

	SDRAM controller for 17 SDRAMs (each 256 MB) present on the board,
	FIFO controller and Glue logic for on-board components.

Target device: Xilinx 4020XL-2 PQ208. Frequency of operation: 50 MHz. RTL in VHDL.

Firmware development including POST, device drivers for serial port, Ethernet controller and flash memory, and control software to interact with the host based control program. A menu driven test application was developed to allow users to conduct the test.


Tools used:
Cadence tools for schematic capture and layout, Modelsim for FPGA simulation, Xilinx Foundation Series for FPGA synthesis and P&R.


Key Customer Value
High quality product development with significant reduction in development time by partnering a team with strong skills in hardware design and well-defined processes and methodologies to address hardware design flows.