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Our customer, a leading US network processor manufacturer, required cycle accurate models for its high-speed network processor and content addressable memory (CAM), and companion chips for Gigabit packet routers.
The customer's challenge lay in ensuring:
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High-speed (10Gb/s) packet processing in LAN and MAN environment |
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10x1Gb/s packet-aggregation and subsequent forwarding to the network processor |
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Support for the self-learning CAM to support packet routing |
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Generation of IPv4/v6 Ethernet packets and functional verification of received packets
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| The customer counted on Tata Elxsi's proven skill sets and infrastructure to counter its challenge. Resonating with customer demand, Tata Elxsi specialists set to work gathering functional requirements for network processor and content addressable memory CAM (1MB/ 2MB/ 4MB) for the packet router. This was followed by cycle accurate model development for the processor, Gigabit aggregator, CAM, and GUI based test automation tool for functional automation. |
Putting rich expertise in chip design, verification and validation to work, Tata Elxsi specialists ensured simulator development saving time and money.
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