 |
RTB conversion of the T3 input to DS0 output and vice
versa |
 |
Conversion of DS0 input to H.110 type output format
with seven serial inputs and seven serial outputs |
 |
Serial EEPROM on the I2C bus stores configuration
data. |
 |
The front board feeds the power supply for the RTB
(10W maximum from +3.3V and +5V combined) |
 |
6U cPCI rear (80mm) plug-in board |
 |
Size 233 x 160 mm |
 |
6 layers |
 |
Board design and PCB layout. |
 |
Firmware development |
| |
 |
Initialization of all devices on RTB |
 |
POST and diagnostics of CPLD, serial EEPROM,
protection circuit, 100MB Ethernet PHY, T3 LIU, PM8315 on RTB as a
standalone process to integrate into and run on swallow front
card processor code. |
 |
All drivers and library functions |
 |
Test jig development (menu driven test
program) using a Xilinx CPLD that acts as a bus translator between
ISA/EISA add-on card and RTB local bus interfaces. |
 |
Mentor Board Station |
 |
Logic analyzer and test equipment for the Gigabit
card |